HfO2-based ferroelectric memories have emerged as promising candidates for low-power, high-density storage and compute-in-memory architectures, owing to their CMOS compatibility, low operating voltage, and excellent thickness scalability. However, as thickness is further scaled down to 5 nm and below, intrinsic physical limitations, such as reduced ferroelectric phase stability and constrained grain size, aggravate reliability issues and hinder practical device applications. Based on this, this talk focuses on performance optimization of sub-3 nm HZO ferroelectric capacitors. Several engineering strategies will be discussed, including wide-temperature phase barrier engineering, oxygen-vacancy-assisted phase transition engineering, and electrode modulation, revealing the critical roles of defect dynamics and phase transition in determining the ferroelectricity and reliability of ultra-thin HZO films. In addition, a fully ALD TiN/HZO/TiN stack is introduced to enable highly reliable 3D-integrated 3 nm HZO capacitors operating at record-low voltage; while a synergistic pre-crystallization etching and fluorine-treatment process is proposed to realize record-thin 2 nm HZO capacitors, breaking the physical limit of thickness scaling.

Powder atomic layer deposition (powder ALD) extends conventional planar ALD to micro- and nanoparticles, enabling conformal atomic-level surface coatings through self-limiting gas–solid reactions. Compared with planar ALD, powder ALD faces greater challenges in particle dispersion, gas–solid contact, mass transfer, and scale-up. By developing efficient precursor delivery, purging strategies, and scalable reactors such as fluidized-bed and rotary-drum systems, large-batch powder coating can be achieved. Powder ALD has shown strong potential in lithium-ion batteries, solid-state batteries, and soft magnetic materials by improving interfacial stability, safety, ionic/electronic performance, and loss reduction, and is advancing rapidly toward industrial application.

Oxide semiconductor transistors hold broad application prospects in fields such as panel displays, monolithic 3D integration, and memory devices, owing to their advantages including low leakage current, low-temperature fabrication, and compatibility with back-end-of-line integration. However, top-gate oxide semiconductor transistors are susceptible to the introduction of bulk defects and interface defects during gate dielectric deposition, which lead to degraded carrier mobility, threshold voltage shifts, subthreshold swing deterioration, and reliability degradation, posing critical challenges that constrain their practical applications. This study systematically elucidates the microscopic structures and formation mechanisms of defects in top-gate oxide semiconductor transistors. Through process parameter variations, electrical characterization, and X-ray photoelectron spectroscopy analysis, it is revealed that the oxygen scavenging effect during gate dielectric deposition induces the formation of oxygen vacancies and In–In bonds, while hydrogen-substituted oxygen vacancy defects serve as a major factor responsible for device performance degradation. This study further proposes an oxygen control strategy combining oxygen-rich device fabrication with oxygen-free annealing: employing O3 precursor for the deposition of both the channel layer and the gate dielectric layer, coupled with high-temperature oxygen annealing, effectively suppresses oxygen-deficient defects such as oxygen vacancies, thereby improving device mobility, reducing subthreshold swing, and enhancing stability under hydrogen-containing environments; subsequently, oxygen-free atmosphere annealing removes oxygen-excess defects such as O–O bonds arising from excess oxygen, significantly improving positive bias temperature stress reliability. Based on this strategy, top-gate indium-rich oxide semiconductor transistors with simultaneously high mobility, high reliability, and high stability have been successfully achieved.

This work discusses the retention loss mechanism of hafnium based ferroelectric silicon channel FeFETs with gate-side interlayer. This work shows a direct experimental extraction technique for trapped charges and quantitative energy band diagrams in the FeFET with metal-insulator-ferroelectric-insulator-semiconductor (MIFIS) structure, derived from the physical relationship between the threshold voltage (Vth) and gate-side interlayer (G.IL) thickness. Through decoupling trapped charges and ferroelectric polarization, this work reveals that: (i) The gate-injected charges and channel-injected charges are excessive and maintain consistent ratios to ferroelectric polarization (~170% and ~130%, respectively). (ii) The retention loss originates from the detrapping of gate-injected charges rather than depolarization of ferroelectrics. (iii) As the G.IL thickens, the gate-injected charge detrapping path transforms from gate-side to channel-side. (iv) activation energy analysis further reveals that HZO thickness rules the degradation mechanism: thin HZO devices are consistent with thermally activated charge detrapping and charge loss toward both the gate side and channel side, while thick HZO devices are consistent with a trap-assisted-tunneling mechanism and charge loss toward the gate side.

Two-dimensional (2D) materials, such as transition metal dichalcogenides (TMDs) and hexagonal boron nitride (h-BN), have firmly established their presence on the next-generation semiconductor roadmap due to their ultimate body thickness and exceptional carrier mobility. However, a significant "Valley of Death" lies between laboratory-scale physical excellence and high-yield fab integration. While conventional chemical vapor deposition (CVD) yields high crystallinity, its requirement for ultra-high temperatures (>800°C) and destructive transfer processes causes wrinkles, contamination, and fatal yield drops, blocking the path to mass production.
To bypass this bottleneck, direct, transfer-free atomic layer deposition (ALD) at low temperatures (<400°C) is highly anticipated, yet it introduces a different set of critical interface challenges. In realistic integration with 3D high-k oxides (e.g., HfO_2), the pristine, dangling-bond-free 2D surface leads to severe nucleation failures and pinholes, while remote interfacial phonon scattering severely degrades carrier mobility. Furthermore, forming low-resistance edge contacts requires precise control over chaotic, multi-element nano-interfaces at the etched vertical cross-sections. Even in the ultimate "all-2D" heterostructures (h-BN/TMD/h-BN), low-temperature ALD suffers from a strict growth anisotropy dilemma, where nuclei easily lose their horizontal orientation and aggressively grow in the vertical (out-of-plane) direction.
In this talk, we systematically list these fatal bottlenecks and demonstrate how universal machine learning atomistic simulations — powered by Matlantis PFP — can approach these chaotic interface kinetics. By leveraging large-scale, high-throughput atomistic simulations beyond the limits of conventional DFT, we present theoretical strategies to navigate these valleys: designing molecular buffer layers to guide uniform 3D oxide growth without damaging the 2D channel, and optimizing process windows to suppress vertical orientation. We highlight the collaborative paradigm shift between computational chemistry and ALD to bridge the gap toward the social implementation of 2D electronics.

In ALD processes, precise control of film properties and deposition profiles in 3D structures is of critical importance. In this presentation, modeling and simulation techniques for predicting both film properties and coverage in deposition process on large-scale patterns are presented, and their application to ALD processes is demonstrated. The spatial distributions of film properties of SiO₂ and TiO₂ deposited by plasma-enhanced (PE-) ALD are discussed in conjunction with experimental results. Furthermore, highly flexible control of 3D deposition profiles utilizing film property distribution is proposed.

Area-Selective Deposition (ASD) is a key process in semiconductor manufacturing [1]. In order to achieve ASD, selective adsorption of an ALD precursor is fundamental and crucial. In this study, we investigated the adsorption selectivity of several ALD precursors on Si, SiO2 and SiN surfaces using both calculations and experiments

Calculated adsorption energies of Trimethylaluminum (TMA) are shown in Fig1. In the calculations, we used Machine Learning Potential [2]. This figure shows that the adsorption onto SiO2(-OH) has the lowest energy, which indicates that TMA is most likely to adsorb on SiO2(-OH). In SiN case, we calculated the adsorption energies of both surfaces with -NH and -F termination because we observed fluorine on DHF dipped SiN surface. From Fig1, TMA is more likely to adsorb on SiN(-NH) than SiN(-F).

In the experiments, TMA was exposed to the Si, SiO2, and SiN substrates after DHF dipping. We studied the amount of adsorbed TMA using XPS measurements (Fig2). From XPS Al 2p spectra, there is the highest concentration of Aluminum on the SiO2 substrate, which agrees with the trends predicted by the calculation. On the SiN substrate, the aluminum amounts were lower than those on SiO2 and higher than those on Si. To clarify the adsorption behavior of TMA on SiN more precisely, we need to quantify the surface densities of -NH and -F terminations. We also studied the adsorption selectivity of other ALD precursors and will show the results in the presentation.

[1] G. N. Parsons and R. D. Clark, Chem. Mater. 2020, 32, 4920−4953.
[2] S. Takamoto, et al. Nat Commun 13, 2991 (2022).

Fig.1 The calculated adsorption energies of TMA on Si, SiO2 and SiN surfaces.
Fig.2 XPS Al2p spectra of the Si, SiO2, and SiN substrates after TMA exposure.

Precious metals are promising materials for advanced semiconductor manufacturing due to their excellent electrical conductivity, chemical stability, thermal resistance, and reliability. Ru has been extensively studied for advanced interconnect applications because its short electron mean free path leads to reduced resistivity scaling in narrow lines, while its high melting point and superior electromigration resistance further enhance its suitability. Pt is also well suited for electrode applications owing to its high work function, thermal stability, oxidation resistance, and favorable electrical properties. Ir and Rh, which possess high work functions and attractive electrical performance at nanoscale dimensions, have also attracted attention as potential materials for electrodes and interconnects. In addition, precious metals exhibit high catalytic activity in a wide range of chemical reactions, making them valuable for chemical transformation and energy conversion processes. These unique properties, which are difficult to achieve with other metals, contribute significantly to technological advances across diverse applications.

TANAKA Precious Metal Technologies has been actively developing precious metal precursors for ALD. In this presentation, we will first introduce our Ru and Pt precursors, focusing on their structural characteristics, together with representative ALD results. As a second topic, we will report on area-selective deposition (ASD) using our Ru precursors. ASD is regarded as a key enabling technology for advanced semiconductor manufacturing because it can reduce process complexity and improve fabrication throughput. We will present experimental results demonstrating inherent ASD behavior arising from differences in substrate surface chemistry.

Fine and cohesive powders (Geldart Group C) are notoriously difficult to fluidize: strong interparticle forces (IPFs) drive agglomeration, channeling, and poor gas-solid contact, hampering their processing in fluidized beds. While the classical Geldart classification treats particle size and density as the governing parameters, it is increasingly clear that surface chemistry, including surface energy, functional groups, charge, and wettability, determines the magnitude and nature of van der Waals, electrostatic, and capillary IPFs, and hence fluidizability. This is particularly critical for pharmaceutical powders, whose high-surface-energy surfaces rich in hydrogen-bonding groups promote strong cohesion, electrostatic charge build-up, and particle welding.

In this talk, I will demonstrate that atomic layer deposition (ALD) provides a uniquely precise route to reshape this interparticle force landscape. Ultrathin oxide films of only a few nanometers, grown by atmospheric-pressure fluidized bed ALD, replace the reactive, high-energy surface of active pharmaceutical ingredients with a chemically inert oxide of lower and more uniform surface energy. This ultrathin coating simultaneously alters the physical properties without altering particle size, crystallinity, or cytocompatibility. The resulting IPF reduction weakens agglomerates, lowers the minimum fluidization velocity, and mitigates channeling, converting poorly fluidizable cohesive powders into smoothly fluidizing materials. We demonstrate these effects across a variety of pharmaceutical powders and show that the approach scales to considerable batch quantities, establishing FB-ALD as both a surface engineering tool and an enabler of its own scale-up.